After setting up the Cadence tools, I faced a lot of little issues. I want to record them and write down these solutions.
These files “.bashrc, cds.lib, .cdsinit, .cdsenv, display.drf ” are very important for using different PDK in IC design. “.bashrc” is to set up the tools’ environment. “cds.lib” is to point out the locations of those libraries used in tools. “.cdsinit” is including configuration files, bind key definition files and skill path (REF has the introduction for cdsinit file). “.cdsenv” is to setup the tool environment. “display.drf” is for display settings.
When I designed an inverter schematic and create new layout cellview, I can’t see the option for layout.
ANS: I have to copy this model and create the new layout cellview again. It works well. That means this issue is related to some errors in the old cell.
When I create the schematic, there is always a warning about using Schematic Editor XL replaced the schematic Editor L. And also when opening the layout, there is a warning about using Virtuoso Layout Suite GXL replaced the Virtuoso Layout Suite XL.
ANS: This is the license issue. When we create schematic or layout, we can select schematic XL or Layout GXL initially and select “always”. Otherwise, you can insert
After I installed BICMOS8HP PDK in my virtual machine CentOS 5.8, every time I create schematic and insert the NFET or PFET from the 8hp library. Cadence will be shut down immediately.
After installing the IBM7RF and using the calibre (v2014.3.27.21) for checking DRC. I got a really weird error. “Error: Current execution environment is VCO=aoi. Software tree is for environment VCO=ixl.”ANS: In the .bashrc, please add
If you use cshell, so you have to edit .cshrc by
setenv CALIBRE_2013_4_ALLOW_IXL_ON_RHEL6 101010
(Calibre supports x86-64 processors. There are two x86-64 processor products supplied by different vendors, AMD and Intel. The Calibre toolset is supported on computers based on either of these processors. As of the 2013.4 Calibre release, MGC_HOME is packaged as two trees, IXL and AOI. The different executables for the IXL and AOI trees are optimized for the different Linux distributions. For example, IXL supports RHEL 5 distributions; AOI supports RHEL 6 distributions. If you use both types of Linux distributions on your network, you should download and install both executables into the same target directory. Set the MGC_HOME variable to either the IXL or the AOI tree. When you invoke Calibre, it will auto-detect the operating system and execute from the correct MGC_HOME tree.)
After designing the layout, every time I opened it and can not see the pin name.
ANS: You have to press “e” and in the Display control area select the PIN name to show the pins in layout.
After installing the IBM7RF PDK, I can’t see the icon of Assura, QRC, Calibre in the layout menu.
ANS: We have to edit .bashrc file. I have recorded my bashrc file in here.
For the QRC settings, I read some manuals: QRC extraction users Manual (ref1, ref2), setting up cadence for the linux. For all these tools, we have to setup HOME directory and PATH in bashrc for bash shell. If you use c shell, you have to setup the cshrc.
For example, in my opinion, the cadence tools for QRC extraction have two: PVE (Virtuoso QRC extraction)and EXT(Cadence QRC extraction). EXT should be the updated version of PVE. For using them, we need to setup the HOME directory and the PATH.
When I read some references, the layout can be generated automatically from schematic and we don’t need to set the MOS W/L. But when I create layout by using Virtuoso Layout L, it doesn’t work and there is not function in connectivity.
ANS: For creating a layout, if you want to use the connectivity –> generate –> all from source, you have to use the Virtuoso Layout Suite XL Editing or above version. At the beginning of creating layout, you can select Layout XL as application. Or you can right click your created layout and click open with to change the layout application.
Reference website one: University of Utah Power Efficient RF Lab
Reference website two: Microelectronics students’ group